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| LAMBDA ADVANCED ANALOG INC. PRELIMINARY AFL27003.3S Series Single Output, Hybrid - High Reliability DC/DC Converter DESCRIPTION The AFL Series of DC/DC converters feature high power density with no derating over the full military temperature range. This series is offered as part of a complete family of converters providing single and dual output voltages and operating from nominal +28, +50, +120 or +270 volt inputs with output power ranging from 80 to 120 watts. For applications requiring higher output power, multiple converters can be operated in parallel. The internal current sharing circuits assure equal current distribution among the paralleled converters. This series incorporates Lambda Advanced Analog's proprietary magnetic pulse feedback technology providing optimum dynamic line and load regulation response. This feedback system samples the output voltage at the pulse width modulator fixed clock frequency, nominally 550 KHz. Multiple converters can be synchronized to a system clock in the 500 KHz to 700 KHz range or to the synchronization output of one converter. Undervoltage lockout, primary and secondary referenced inhibit, soft-start and load fault protection are provided on all models. These converters are hermetically packaged in two enclosure variations, utilizing copper core pins to minimize resistive DC losses. Three lead styles are available, each fabricated with Lambda Advanced Analog's rugged ceramic lead-to-package seal assuring long term hermeticity in the most harsh environments. Manufactured in a facility fully qualified to MIL-PRF38534, these converters are available in four screening grades to satisfy a wide range of requirements. The CH grade is fully compliant to the requirements of MIL-PRF-38534 for class H. The HB grade is processed and screened to the class H requirement, but may not necessarily meet all of the other requirements, e.g., element evaluation and Periodic Inspections (P.I.) not required. Both grades are tested to meet the complete group "A" test specification over the full military temperature range without output power deration. Two grades with more limited screening are also available for use in less demanding applications. Variations in electrical, mechanical and screening can be accommodated. Contact Lambda Advanced Analog for special requirements. FEATURES n n n n n n n n n n n n n n n n n 160 To 400 Volt Input Range 3.3 Volt Output High Power Density - 50 W / in3 66 Watt Output Power Parallel Operation with Stress and Current Sharing Low Profile (0.380") Seam Welded Package Ceramic Feedthru Copper Core Pins High Efficiency - 72% Full Military Temperature Range Continuous Short Circuit and Overload Protection Remote Sensing Terminals Primary and Secondary Referenced Inhibit Functions Line Rejection > 60 dB - DC to 50KHz External Synchronization Port Fault Tolerant Design Dual Output Versions Available Standard Military Drawings Available SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Input Voltage Soldering Temperature Case Temperature -0.5V to 500V 300C for 10 seconds Operating-55C to +125C Storage -65C to +135C AFL27003.3S TABLE I. Electrical Performance Characteristics. Test Symbol Conditions -55C TC +125C VIN = 28 V dc 5%, CL = 0 unless otherwise specified Group A Subgroups Device Type Limits Unit Min 3.27 Output voltage VOUT IOUT = 0 1 2,3 Output current 6/ Output ripple voltage Line regulation IOUT VRIP VRLINE VIN = 16, 28, 40 v dc VIN = 16, 28, 40 v dc B.W.= 20 Hz to 10 MHz VIN = 16, 28, 40 v dc IOUT = 0, 10 A, and 20 A Load regulation VRLOAD VIN = 16, 28, 40 v dc IOUT = 0, 10 A, and 20 A IN 1,2,3 01 1,2,3 1,2,3 1,2,3 01 01 01 01 3.23 Max 3.33 V 3.37 20 A MV p-p mV 30 10 35 mV Input current IOUT = No load 1 2,3, 01 15 17 3 5 mA Inhibit 1, (pin 4) shorted to input return (pin 2) Inhibit 2, (pin 12) shorted to output return (pin 8) Input ripple current IRIP IOUT = 20 A B.W.= 20 Hz to 10 MHz Efficiency Isolation EFF ISO IOUT = 20 A Input to output or any pin to case (except pin 3) at 500 V dc, TC = +25C No effect on dc performance, TC = +25C 1,2,3 1,2,3 1,2,3 01 60 mA p-p 1,2,3 1 01 01 72 100 % M Maximum Capacitive load 1/ See footnotes at end of table. CL 4 01 10,000 F 2 AFL27003.3S TABLE I. Electrical Performance Characteristics - Continued. Test Symbol Conditions -55C TC +125C VIN =28 V dc 5%, C= 0 unless otherwise specified Group A subgroups Device type Limits Unit Min Max Power dissipation load fault PD Overload 6/ Short circuit 1,2,3 01 30 30 W Current Limit Point 5/ ICL VOUT = 90% VNOM VIN = 28 V 1 2 3 01 115 105 125 125 % 115 140 600 700 +450 KHz KHz mV pk Switching frequency Sync frequency range Output response to step transient load changes 2/ 8/ FS IOUT = 20 A 1,2,3 4,5,6 4,5,6 01 01 01 500 500 -450 Fsync VOTLOAD IOUT = 20 A 50% to/from 100% 10% to/from 50% Recovery time, step transient load changes 2/ 8/ TTLOAD 50% to/from 100% 4,5,6 01 -450 +450 200 s 10% to/from 50% Input step 16 V to/from 40 V dc, IOUT = 20 A Input step 16 V to/from 40 V dc, IOUT = 20 A IOUT = 0 and 20 A IOUT = 0 and 20 A 4,5,6 01 400 mV pk Output response to transient step line changes 1/ 2/ 3/ Recovery time transient step line changes 1/ 2/ 3/ Turn on overshoot 4/ Turn on delay 4/ VOTLINE -500 500 TTLINE 4,5,6 01 500 s VTonOS TonD TrLF 4,5,6 4,5,6 4,5,6 01 01 01 01 50 50 300 250 120 120 mV pk ms ms KHrs Load fault recovery MTBF MIL-HDBK-217, AIF @ Tc = 40C Notes: 1/ 2/ 3/ 4/ 5/ 6/ 7/ 8/ 9/ Parameters not 100% tested but are guaranteed to the limits specified in the table. Recovery time is measured from the initiation of the transient to where VOUT has returned to within 1 percent of VOUT at 50 percent load. Line transient transition time 10 microseconds. Turn on delay is measured with an input voltage rise time of between 100 and 500 volts per millisecond. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal. Parameter verified as part of another test. All electrical tests are performed with remote sense leads connected to the output lead at the load. Input step transition time 100 microseconds. Enable inputs internally pulled high. Nominal open circuit voltage = 4.0VDC. 3 AFL27003.3S Case Outlines Case X Case W Pin Variation of Case Y 3.000 2.760 o 0.128 0.050 0.250 0.250 0.050 12 7 0.25 typ 12 7 1 6 1.260 1.500 1.000 Ref 0.200 Typ Non-cum Pin o 0.040 1.000 2.500 0.220 0.220 2.800 0.525 Pin o 0.040 2.975 max 0.238 max 0.42 0.380 Max 0.380 Max Case Y 1.150 0.300 o 0.140 0.050 Case Z Pin Variation of Case Y 0.050 0.250 0.250 1 6 1.500 1.750 2.00 1.000 Ref 0.200 Typ Non-cum Pin o 0.040 1.000 Ref Pin o 0.040 1.750 2.500 0.375 0.220 0.220 0.36 2.800 2.975 max 0.525 0.238 max 0.380 Max 0.380 Max Tolerances, unless otherwise specified: .XX .XXX = = 0.010 0.005 4 AFL27003.3S Pin Designation Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Designation Positive Input Input Return Case Enable 1 Sync Output Sync Input Positive Output Output Return Return Sense Positive Sense Share Enable 2 Available Screening Levels and Process Variations for AFL 27003.3S Series. MIL-STD-883 Method No Suffix -20 to +85C Requirement Temperature Range Element Evaluation Internal Visual Temperature Cycle Constant Acceleration Burn-in Final Electrical (Group A) ES Suffix -55C to +125C HB Suffix -55C to +125C CH Suffix -55C to +125C MIL-PRF-38534 2017 1010 2001 1015 MIL-PRF-38534 & Specification u Cond B 500g 96hrs @ 125C u Cond C Cond A 160hrs @ 125C -55, +25, +125C u Cond C Cond A 160hrs @ 125C -55, +25, +125C 25C 25C Seal, Fine & Gross External Visual 1014 2009 Cond C Cond A, C u Cond A, C u Cond A, C u per Commercial Standards Part Numbering AFL 270 05 S X / CH Model Input Voltage 270 = 270V 28 = 28V Screening Case Style W, X, Y, Z - , ES HB, CH Output Voltage 03.3 = 03.3V, 05 = 5V, 06 = 6V, 09 = 9V 12 = 12V, 15 = 15V 28 = 28V Outputs S = Single D = Dual 5 AFL27000S Circuit Description Figure I. AFL Single Output Block Diagram DC INPUT 1 INPUT FILTER ENABLE 1 4 PRIMARY BIAS SUPPLY OUTPUT FILTER 7 10 + OUTPUT + SENSE CURRENT SENSE SYNC OUTPUT 5 SHARE CONTROL SYNC INPUT 6 FB ERROR AMP & REF AMPLIFIER 11 12 SHARE ENABLE 2 CASE 3 SENSE AMPLIFIER 9 8 - SENSE OUTPUT RETURN INPUT RETURN 2 Circuit Operation and Application Information The AFL series of converters employ a forward switched mode converter topology. (refer to Figure I.) Operation of the device is initiated when a DC voltage whose magnitude is within the specified input limits is applied between pins 1 and 2. If pin 4 is enabled (at a logical 1 or open) the primary bias supply will begin generating a regulated housekeeping voltage bringing the circuitry on the primary side of the converter to life. Two power MOSFETs used to chop the DC input voltage into a high frequency square wave, apply this chopped voltage to the power transformer. As this switching is initiated, a voltage is impressed on a second winding of the power transformer which is then rectified and applied to the primary bias supply. When this occurs, the input voltage is shut out and the primary bias voltage becomes exclusively internally generated. The switched voltage impressed on the secondary output transformer winding is rectified and filtered to provide the converter output voltage. An error amplifier on the secondary side compares the output voltage to a precision reference and generates an error signal proportional to the difference. This error signal is magnetically coupled through the feedback transformer into the controller section of the converter varying the pulse width of the square wave signal driving the MOSFETs, narrowing the width if the output voltage is too high and widening it if it is too low. Remote Sensing Connection of the + and - sense leads at a remotely located load permits compensation for resistive voltage drop between the converter output and the 6 load when they are physically separated by a significant distance. This connection allows regulation to the placard voltage at the point of application. When the remote sensing feature is not used, the sense leads should be connected to their respective output terminals at the converter. Figure III. illustrates a typical application. Inhibiting Converter Output As an alternative to application and removal of the DC voltage to the input, the user can control the converter output by providing TTL compatible, positive logic signals to either of two enable pins (pin 4 or 12). The distinction between these two signal ports is that enable 1 (pin 4) is referenced to the input return (pin 2) while enable 2 (pin 12) is referenced to the output return (pin 8). Thus, the user has access to an inhibit function on either side of the isolation barrier. Each port is internally pulled "high" so that when not used, an open connection on both enable pins permits normal converter operation. When their use is desired, a logical "low" on either port will shut the converter down. Figure II. Enable Input Equivalent Circuit +5.6V 100K Pin 4 or Pin 12 1N4148 290K 2N3904 150K Pin 2 or Pin 8 Disable Internally, these ports differ slightly in their function. In use, a low on Enable 1 completely shuts down all circuits in the converter while a low on Enable 2 shuts down the secondary side while altering the controller duty cycle to near zero. Externally, the use of either port is transparent save for minor differences in idle current. (See specification table). Synchronization of Multiple Converters When operating multiple converters, system requirements often dictate operation of the converters at a common frequency. To accommodate this requirement, the AFL series converters provide both a synchronization input and output. The sync input port permits synchronization of an AFL converter to any compatible external frequency source operating between 500 and 700 KHz. This input signal should be referenced to the input return and have a 10% to 90% duty cycle. Compatibility requires transition times less than 100 ns, maximum low level of +0.8 volts and a minimum high level of +2.0 volts. The sync output of another converter which has been designated as the master oscillator provides a convenient frequency source for this mode of operation. When external synchronization is not required, the sync in pin should be left unconnected thereby permitting the converter to operate at its' own internally set frequency. The sync output signal is a continuous pulse train set at 550 50 KHz, with a duty cycle of 15 5%. This signal is referenced to the input return and has been tailored to be compatible with the AFL sync input port. Transition times are less than 100 ns and the low level output impedance is less than 50 ohms. This signal is active when the DC input voltage is within the specified operating range and the converter is not inhibited. This output has adequate drive reserve to synchronize at least five additional converters. A typical synchronization connection option is illustrated in Figure III. Figure III. Preferred Connection for Parallel Operation Power Input 1 12 Vin Rtn Case Enable 1 Sync Out Sync In Enable 2 Share AFL + Sense - Sense Return + Vout 7 Optional Synchronization Connection 6 Share Bus 1 12 Vin Rtn Case Enable 1 Sync Out Sync In 6 Enable 2 Share AFL + Sense - Sense Return + Vout 7 to Load 1 12 Vin Rtn Case Enable 1 Sync Out Sync In 6 Enable 2 Share AFL + Sense - Sense Return + Vout 7 (Other Converters) Parallel Operation -- Current and Stress Sharing Figure III. illustrates the preferred connection scheme for operation of a set of AFL converters with outputs operating in parallel. Use of this connection 7 permits equal sharing of a load current exceeding the capacity of an individual AFL among the members of the set. An important feature of the AFL series operating in the parallel mode is that in addition to sharing the current, the stress induced by temperature will also be shared. Thus if one member of a paralleled set is operating at a higher case temperature, the current it provides to the load will be reduced as compensation for the temperature induced stress on that device. When operating in the shared mode, it is important that symmetry of connection be maintained as an assurance of optimum load sharing performance. Thus, converter outputs should be connected to the load with equal lengths of wire of the same gauge and sense leads from each converter should be connected to a common physical point, preferably at the load along with the converter output and return leads. All converters in a paralleled set must have their share pins connected together. This arrangement is diagrammatically illustrated in Figure III. showing the outputs and sense pins connected at a star point which is located close as possible to the load. As a consequence of the topology utilized in the current sharing circuit, the share pin may be used for other functions. In applications requiring only a single converter, the voltage appearing on the share pin may be used as a "current monitor". The share pin open circuit voltage is nominally +1.00v at no load and increases linearly with increasing output current to +2.20v at full load. Thermal Considerations Because of the incorporation of many innovative technological concepts, the AFL series of converters is capable of providing very high output power from a package of very small volume. These magnitudes of power density can only be obtained by combining high circuit efficiency with effective methods of heat removal from the die junctions. This requirement has been effectively addressed inside the device; but when operating at maximum loads, a significant amount of heat will be generated and this heat must be conducted away from the case. To maintain the case temperature at or below the specified maximum of 125C, this heat must be transferred by conduction to an appropriate heat dissipater held in intimate contact with the converter base-plate. Because effectiveness of this heat transfer is dependent on the intimacy of the baseplate-heatsink interface, it is strongly recommended that a high thermal conductivity heat transferring medium is inserted between the baseplate and heatsink. The material most frequently utilized at the factory during all testing and burn-in processes is sold under the 1 trade name od Sil-PadR 400 . This particular product is an insulator but electrically conductive versions are also available. Use of these materials assures maximum surface contact with the heat 8 dissipater thereby compensating for any minor surface variations. While other available types of heat conductive materials and thermal compounds provide similar effectiveness, these alternatives are often less convenient and are frequently messy to use. A conservative aid to estimating the total heat sink A surface area ( HEAT SINK) required to set the maximum case temperature rise (T) above ambient temperature is given by the following expression: T A HEAT SINK 0.85 80 P where -1.43 - 3.0 T = Case temperature rise above ambient 1 P = Device dissipation in Watts = POUT - 1 Eff As an example, it is desired to maintain the case temperature of an AFL27015S at +85C in an area where the ambient temperature is held at a constant +25C; then T = 85 - 25 = 60C. From the Specification Table, the worst case full load efficiency for this device is 83%; therefore the power dissipation at full load is given by 1 P = 120 * - 1 = 120 * ( 0.205) = 24.6W .83 and the required heat sink area is -1.43 60 - 3.0 = 71 in 2 A HEAT SINK = 80 * 24.6 0.85 Thus, a total heat sink surface area (including fins, if any) of 71 in2 in this example, would limit case rise to 60C above ambient. A flat aluminum plate, 0.25" thick and of approximate dimension 4" by 9" (36 in2 per side) would suffice for this application in a still air environment. Note that to meet the criteria in this example, both sides of the plate require unrestricted exposure to the ambient air. 1 Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN Input Filter The AFL27000S series converters incorporate a single stage LC input filter whose elements dominate the input load impedance characteristic during the turn-on sequence. The input circuit is as shown in Figure IV. Figure IV. Input Filter Circuit 8.4H Pin 1 0.54fd Finding a resistor value for a particular output voltage, is simply a matter of substituting the desired output voltage and the nominal device voltage into the equation and solving for the corresponding resistor value. Figure V. Connection for VOUT Adjustment Enable 2 Share RADJ AFL270xxS + Sense - Sense Return To Load + Vout Pin 2 Caution: Do not set Radj < 500 Undervoltage Lockout A minimum voltage is required at the input of the converter to initiate operation. This voltage is set to 140 5 volts. To preclude the possibility of noise or other variations at the input falsely initiating and halting converter operation, a hysteresis of approximately 10 volts is incorporated in this circuit. Thus if the input voltage droops to 130 5 volts, the converter will shut down and remain inoperative until the input voltage returns to 140 volts. Output Voltage Adjust In addition to permitting close voltage regulation of remotely located loads, it is possible to utilize the converter sense pins to incrementally increase the output voltage over a limited range. The adjustments made possible by this method are intended as a means to "trim" the output to a voltage setting for some particular application, but are not intended to create an adjustable output converter. These output voltage setting variations are obtained by connecting an appropriate resistor value between the +sense and -sense pins while connecting the sense pin to the output return pin as shown in Figure V. below. The range of adjustment and corresponding range of resistance values can be determined by use of the equation presented below. VNOM = 100 * VOUT - VNOM -.025 Attempts to adjust the output voltage to a value greater than 120% of nominal should be avoided because of the potential of exceeding internal component stress ratings and subsequent operation to failure. Under no circumstance should the external setting resistor be made less than 500. By remaining within this specified range of values, completely safe operation fully within normal component derating is assured. Examination of the equation relating output voltage and resistor value reveals a special benefit of the circuit topology utilized for remote sensing of output voltage in the AFL270xxS series of converters. It is apparent that as the resistance increases, the output voltage approaches the nominal set value of the device. In fact the calculated limiting value of output voltage as the adjusting resistor becomes very large is 25mV above nominal device voltage. The consequence is that if the +sense connection is un-intentionally broken, an AFL270xxS has a failsafe output voltage of Vout + 25mV, where the 25mV is independent of the nominal output voltage. It can be further demonstrated that in the event of both the + and - sense connections being broken, the output will be limited to Vout + 440mV. This 440 mV is also essentially constant independent of the nominal output voltage. While operation in this condition is not damaging to the device, not all performance parameters will be met. Performance Data Typical performance data is graphically presented on the following pages for selected parameters on a variety of AFL270xxS type converters. The data presented was selected as representative of more critical parameters and for general interest in typical converter applications. 9 Radj Where VNOM = device nominal output voltage, and VOUT = desired output voltage (c)Lambda Advanced Analog The information in this data sheet has been carefully checked and is believed to be accurate; however no responsibility is assumed for possible errors. These specifications are subject to change without notice. 9849 LAMBDA ADVANCED ANALOG INC. MIL-PRF-38534 Qualified ISO9001 Registered 2270 Martin Avenue Santa Clara CA 95050-2781 (408) 988-4930 FAX (408) 988-2702 10 |
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